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karlianev
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Nathan L.
@nlopesr
Henderson
@HendsMede1r0s
Samuel Morais
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Leandro Sérgio
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Scheduler Simulator
Examples of codes for Operating System concepts
This repository contains a functional implementation of the SAP-1 (Simple-As-Possible 1) computer architecture, designed by Albert Paul Malvino. The project is written in SystemVerilog and focuses on a modular design, utilizing a Finite State Machine (FSM) for the Control Unit.
Site para a Disciplina Engenharia de Software II.
Repositório para Auxilio no Ensino de Engenharia de Software do BSI/CERES/UFRN - Caicó RN
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